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Performance Equation

CPU Performance

CPU Time = Instruction Count * Clocks Per Instruction * Clock Time
or
CPU Time = Instruction Count * Clocks Per Instruction * 1 / Clock Frequency

CPU Time

  • Sec. / Program
  • How many seconds does a program take to get completed?
  • Measure of CPU performance

Instruction Count (IC)

  • Instructions / Program
  • How many instructions are there in one program? Recall that when a program gets assembled, it is broken down into simple instructions.
  • One can decrease IC by replacing each instructions with a more complex one, but that could lead to an increase in Clocks Per Instruction or/and Clock Time.
  • IC of CISC processer is two or three times less than that of RISC processer, since each instructions are more complex and therefore decreases IC.
    • Some CISC processors have iteration by default, decreasing IC to by an order of 10^2 when compared to that of RISC.
    • Note that Clocks Per Instruction may increase in a CISC processor, since each instruction will take more time to be completed.

Clocks Per Instruction (CPI)

  • Clocks / Instructions
  • In a order of 10^0
  • How many clocks does take to complete one instruction?

    "Number of cycles to execute some code divided by number of instructions. This is approximately the average number of cycles between instruction initiations (instruction starts)."

(cited from http://www.ece.lsu.edu/ee4720/2012/lsli02.pdf)

  • CPI increases with complex intructions
  • CPI can decrease with instruction-level parallelism and pipelining (overlapping execution of instructions, start out of order)

https://drive.google.com/file/d/1BoiXVFq2WnrF3A-P2nDTtZBQcmVZtkYw/view

When one instruction is executed at a time, CPI is high (in this case, 4). Taken from http://www.ece.lsu.edu/ee4720/2012/lsli02.pdf

https://drive.google.com/file/d/1scsMWmXk7fCA7wE2zGAYRMSLRrS1YmlD/view

When multiple instructions are executed "out of order", or pipelined, CPI decreases significantly (in this case, 1)

We can even run multiple instructions at the same tick, which is called superscalar pipelining, and this decreases CPI even more (in this case, 1/2)

Clock Time (CT), 1 / Clock Frequency (1/Φ)

  • Seconds / Clocks
  • In an order of 10^-9; A 2 GHz processor has a CT of 0.5ns.
  • How many clocks can a processor handle in a second?
  • Where Moore's law works

    "Technology has improved so that about every 3 years, linear dimensions have decreased by a factor of 2. Transistor power consumption has decreased by a similar factor. Speed increased by a similar factor until about 2005."

(cited from https://www.d.umn.edu/~gshute/arch/performance-equation.xhtml)

Example Problem

  • If a program that has 10^9 instructions runs on a 2 GHz processor optimized to 1 CPI, how much CPU time is required to complete the program?
       10^9 * 1 * 1/(2*10^9) = 0.5s
  • If one program has 10^8 instructions and runs under 1 GHz CT and the other program has 3*10^8 instructions and runs under 2 GHZ CT, how much CPU time is required to complete both programs? (CPI is 2 for both programs)
       10^8 * 1 * 1/(1 * 10^9) + 3 * 10^8 * 2 * 1/(2 * 10^9) = 1/10 + 3/10 = 0.4s

References


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Last-modified: 2019-06-27 (木) 09:45:18 (896d)