慶應義塾大学
2012年度 秋学期

コンピューター・アーキテクチャ
Computer Architecture

2012年度秋学期 火曜日3時限
科目コード: 35010 / 2単位
カテゴリ:
開講場所:SFC
授業形態:講義
担当: Rodney Van Meter
E-mail: rdv@sfc.keio.ac.jp

第4回 10月18日 Lecture 4, October 18:
並列のデモ/プロセッサー:命令の基本
Parallel Demonstrations / Processors: Basics of Instruction Sets

Today's Pictures

Ray Beausoleil, Roberta Ramponi, Thomas Jennewein, Valerio Scarani, and Gerard 't Hooft at Quantum Horizons, Taipei, 2012
Thomas Jennewein, Valerio Scarani, Gerard 't Hooft and Rod Van Meter at Quantum Horizons, Taipei, 2012

Yesterday I gave a presentation at Quantum Horizons in Taipei. The guy on the right is Gerard 't Hooft, Nobel laureate in physics. The guy on the far left is Ray Beausoleil, HP Fellow. Ray made and interesting comment:

The success of quantum technologies will depend on packaging.

Outline of This Lecture

Parallel Demonstrations

for ( i = 0 ; i < n ; i++ ) {
  result += array[i];
}
#pragma omp parallel for
for ( i = 0 ; i < n ; i++ ) {
  array[i] *= 2;
}
#pragma omp parallel for reduction(+:result)
for ( i = 0 ; i < n ; i++ ) {
  result += array[i];
}

Review: プロセッサー・パフォマンス定式
The Processor Performance Equation

CPU time = (seconds )/ program = (Instructions )/ program × (Clock cycles )/ Instruction × (Seconds )/ Clock cycle


Instruction Sets

命令:基本の概念
Instructions: the Basic Idea

Computers execute instructions, which are usually compiled by a compiler, a piece of software that translates human-readable (usually ASCII) code into computer-readable binary.

コンピューターが命令を実行する。その命令はコンパイラーが人間の 読めるプログラムから通訳してある。例えば:

LOAD	R1, A
ADD	R1, R3
STORE	R1, A
This example shows three instructions, to be executed sequentially. The first instruction LOADs a value into register R1 from memory (we will come back to how the value that is loaded into R1 is found in a minute). The second instruction ADDs the contents of register R3 into register R1, then the third instruction STOREs the result into the original memory location.

CPU: the Central Processing Unit

ちょっと抽象的な絵ですが:

CPU block diagram
簡単に説明すると、CPUはこの機能の部品がある:

メモリー(記録):レジスター、スタック、ヒープ
Memory: Registers, Stacks, and Heaps

It is the job of the compiler to decide how to use the registers, stack, and heap most efficiently. Note that these functions apply to both user programs, or applications, and the operating system kernel.

命令の種類
Types of Instructions

Classes of Instructions Sets

The diagram below shows how data flows in the CPU, depending on the class of instruction set. (TOS = Top of Stack)

differences in data
						  flow for instruction
						  set classes

Memory Addressing

Each operand of an instruction must be fetched before the instruction can be executed. Data may come from (There are other addressing modes, as well, which we will not discuss.)

Immediate
ADD R4,#3
Regs[R4] ← Regs[R4] + 3
Register
ADD R4,R3
Regs[R4] ← Regs[R4] + Regs[R3]
Register Indirect
ADD R4, (R1)
Regs[R4] ← Regs[R4] + Mem[Regs[R1]]
Displacement
ADD R4, 100(R1)
Regs[R4] ← Regs[R4] + Mem[100+Regs[R1]]
Depending on the instruction, the data may be one of several sizes (using common modern terminology):

What an Instruction Looks Like

An instruction must contain the following:

Some architectures always use the same number of arguments, others use variable numbers. In some architectures, the addressing information and address are always the same length; in others they are variable.

In general, the arithmetic instructions are either two address or three address. Two-address operations modify one of the operands, e.g.

ADD R1, R3	; R1 = R1 + R3
whereas three-address operations specify a separate result register, e.g.
ADD R1, R2, R3	; R3 = R1 + R2
(n.b.: in some assembly languages, the target is specified first; in others, it is specified last.)

The MIPS architecture, developed in part by Professors Patterson and Hennessy, is relatively easy to understand. Its instructions are always 32 bits, of which 6 bits are the opcode (giving a maximum of 64 opcodes). rs and rt are the source and target registers, respectively. (Those fields are five bits; how many registers can the architecture support?) Instructions are one of three forms:

宿題
Homework

This week's homework (submit via SMS):

Programming:

  1. Install the MIPS simulator software on your laptop. You can get it from SourceForge.

Analysis:

  1. The problem set is here.

Next Lecture

Next lecture:

第5回 10月28日
Lecture 3, October 28: Processors: Instruction Sets and the Data Path

Readings for next time:

Additional Information

その他