慶應義塾大学
2008年度 秋学期

コンピューター・アーキテクチャ
Computer Architecture

2008年度秋学期　火曜日3時限
科目コード: 35010 / 2単位
カテゴリ:
開講場所：SFC
授業形態：講義
担当: Rodney Van Meter
E-mail: rdv@sfc.keio.ac.jp

第1回 9月30日 Lecture 1, September 30:
What's in a Computer?

Outline of This Lecture

Review of Students' Programming Backgrounds

Take a sheet of paper. On it, put your name and student ID number. Then answer the following questions:

  1. Do you currently have a working C compiler on your system?
    現在、C言語のコンパイラーを持っていますか。
  2. List the operating systems and versions you have used:
    今までの使ったことがあるオペレーティングシステムをリストアップしてください。
    Microsoft Windows, MacOS, Linux, FreeBSD, Solaris?
  3. How many years ago did you start programming?
    何年前にプログラ ミングを始まったでしょう。
  4. Have you administered a multi-user computer system before, such as a web server or file server?
    マルチユーザーのコンピューター（ウェブサーバー、ファイルサーバーなど）を管理したことありますか。
  5. List the languages you have programmed in:
    今までの使ったことがある言語をリストアップしてください：
    assembler, BASIC, C,　C++, Fortran, Java, Lisp, Perl, Python, Ruby, sh, ...?
  6. Which tools have you used:
    このリストの中にはどのツールを使ったことがある：
    make, CVS, RCS, Microsoft VisualC etc., automake, grep, sed, awk, lex/flex, yacc/bison, Spirit, ...?
  7. What is the longest program you have written, measured in lines?
    ひとつのプログラムは何行まで書きましたか。
  8. When you write code, do you write comments?
    プログラムを書いているとき、コメントを書きますか。
  9. Have you worked in a team to write one program? What source code control system did you use? How did you divide up the work, and how did you define and test interfaces between members of the team?
    一 人以上のグループでプログラムを書いたことありますか。ソースコードコント ロールはどうやってしましたか。仕事がどうやって分割しましたか。インター フェースの定義のしかたには何をしましたか。

The lectures for this class will be in Japanese, but non-Japanese-speaking students are encouraged to join. Adequate materials to learn the topic and complete the assignments will be available in English.

ムーアの法則の後期に入ったということは、先端のマルチコア・マイクロプロセッサは新しい時代を迎えたということだ。これからのコンピューターデザインはその事実をふまえなければなりません。並列データ処理、データの転送、熱等は非常に重要なファクターです。現在のコンピュータ環境を支えるマイクロプロセッサの技術を中心に扱い、動作原理や高速化の原理について考えます。次のような課題を扱います。

以下の事項を注意してください。
内容を理解し、課題を行う上で基本的なC言語の知識が必要となる場合があります。しかし、大きなプログラムや複雑なプログラムを作成する能力は必要ありません。C言語の文法 (繰り返し、条件判断、関数呼出し、記憶クラスなど) の知識だけで十分です。したがって、Java 言語や Pascal 言語などの他の手続き型言語しか知らなくても、数時間の自習で理解できます。


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We have entered the late Moore's Law period of computer architecture, as shown by the latest multicore microprocessors. From this point forward, computer design must concentrate on parallel processing, data transfer, and heat management as especially important factors. Studying modern microprocessor design, we will see where performance is created in computer systems, including:



Note:

Students will be expected to understand at least one high-level language as part of the course. Lectures will be in Japanese, but non-Japanese speaking students are encouraged to join the class. Sufficient materials will be available in English to learn the material and complete the assignments.

教材
Course Outline

教科書 Textbook

The textbooks are available in the Seikyo:

コンピュータの構成と設計~ハードウエアとソフトウエアのインタフェース 第3版 (上)
デイビッド・A. パターソン (著), ジョン・L. ヘネシー (著), David A. Patterson (原著), John L. Hennessy (原著), 成田 光彰 (翻訳)
日経BP社
ISBN-10: 482228266X
ISBN-13: 978-4822282660
and the second volume:
コンピュータの構成と設計~ハードウエアとソフトウエアのインタフェース 第 3版 (下)
デイビッド・A. パターソン (著), ジョン・L. ヘネシー (著), David A. Patterson (原著), John L. Hennessy (原著), 成田 光彰 (翻訳)
日経BP社
ISBN-10: 4822282678
ISBN-13: 978-4822282677
Computer Organization and Design: The Hardware-Software Interface, third edition
David A. Patterson and John L. Hennessy
Morgan Kauffman, 2007
ISBN-10: 0123706068
ISBN-13: 978-0123706065

A recommended, but not required, more advanced text:

コンピュータアーキテクチャ 定量的アプローチ 第4版
John L. Hennessy (著), ジョン・L・ヘネシー (著), デイビッド・A・パター ソン (著), David A. Patterson (著), 中條 拓伯 (監修, 翻訳), 吉瀬 謙二 (翻訳), 佐藤 寿倫 (翻訳), 天野 英晴 (翻訳)
翔泳社
ISBN-10: 4798114405
ISBN-13: 978-4798114408
Computer Architecture: A Quantitative Approach, fourth edition
John L. Hennessy and David A. Patterson
Morgan Kauffman, 2007
ISBN: 978-0-12-370490-0

Lecture by Lecture

Requirements

The course consists of thirteen ninety-minute classes. Students are expected to read a large amount of material from the textbook and accompanying CD, contribute to classroom discussions, complete weekly homework, and pass a final exam.

成績の仕方
Grading

Your grade will be determined as follows:

宿題
Homework

Twelve homework assignments will be handed out; you are expected to complete ten. Each homework will typically consist of:

Homework is due at the start of class each week. Homework will be submitted via the SFS system.

Contacting Me/Office Hours
連絡先/オフィスアワー

If you need to contact me, email is the preferred method. Please put "COMP-ARCH:" in the Subject field of the email. If I do not respond to a query within 24 hours, please resend. For more urgent matters, junsec should know how to get ahold of me.

Office Hours, Fall 2008秋のオフィスアウアー：Wednesday （水曜日）, 9-12, Delta N210. You may come to my office during this time without an appointment. If you wish to see me otherwise, you can attempt to find me directly, or send me email to arrange an appointment.

What's a Computer?

What's in a Computer?

(Here's the fun part...)

Fundamentals of Computer Design

Introduction

Processors have gotten 6,505 times faster in 27 years! Of that, about seven times is due to architecture, the rest is due to improvements in technology: smaller, faster transistors and shorter, faster wires.

1978:

A VAX 11/780

Image from NetBSD VAX Gallery.

A VAX 11/780

Image from Carlo's Hardware and Embedded Systems.

2004(?):

AMD Opteron 64.
A 300mm wafer containing 117 AMD Opteron chips implemented in a 90nm process.

A 300mm wafer containing 117 AMD Opteron chips implemented in a 90nm process.

Technology Trends

The current (2007) transistor gate length in a microprocessor is about 25 nanometers. That's about fifty times the lattice constant of crystalline silicon. We already effectively build transistors from a countable number of atoms.

ITRS 2003 gate length figure

One important impact of the continuing increase in the number of transistors in a chip is power consumption. The number of transistors is increasing faster than the power per transistor is dropping. A key innovation is using hafnium as the gate dielectric, as Intel is doing; they claim 100x improvement in current leakage when the transistor is off, which is a huge improvement in total power consumption.

An engineer from Intel said at a recent conference that, by 2014, a chip will contain 100 billion transistors, 20 billion of which don't work, and another 10 billion of which will quit during the lifetime of the chip.

Moore's Law transistors per chip graph from Intel

定量てきなデザイン概念
Quantitative Principles of Design

Hennessy & Patterson's Five Principles:

  1. Take Advantage of Parallelism
  2. Principle of Locality
  3. Focus on the Common Case
  4. Amdahl's Law
  5. The Processor Performance Equation
I would add to this one imperative: Achieve Balance.

Take Advantage of Parallelism

Parallelism can be found by using multiple processors on different parts of the problem, or multiple functional units (floating point units, disk drives, etc.), or by pipelining, dividing an individual computer instruction into several parts and executing the parts of different instructions at the same time in different parts of the CPU.

Principle of Locality

Programs and data tend to reuse data and instructions that have been recently used. There are two forms of locality: spatial and temporal. Locality is what allows a cache memory to work.

Focus on the Common Case

The things that are done a lot should be fast; the things that are rare may be slow.

Amdahl's Law

Amdahl's Law tells us how much improvement is possible by making the common case fast, or by parallelizing part of the algorithm. In the example below, 3/5 of the algorithm can be parallelized, meaning that three times as much hardware applied to the problem gains us only a reduction from five time units to three.

Example of Amdahl's Law, parallel and serial portions.

Some problems, most famously graphics, are known as "embarrassingly parallel" problems, in which extracting parallelism is trivial, and performance is primarily determined by input/output bandwidth and the number of processing elements available. More generally, the parallelism achievable is determined by the dependency graph. Creating that graph and scheduling operations to maximize the parallelism and enforce correctness is generally the shared responsibility of the hardware architecture and the compiler.

Dependency graph for the above figure.

プロセッサー・パフォマンス定式
The Processor Performance Equation

CPU time = (seconds )/ program = (Instructions )/ program × (Clock cycles )/ Instruction × (Seconds )/ Clock cycle

宿題
Homework

This week's homework (submit via SFS):

  1. Demonstrate that you have a working compiler setup where you will be able to write programs for class. Capture the output of the compilation and execution of a simple program (such as "Hello, world") and submit it through the SFS system. Include the amount of time it took you to complete this exercise.
  2. Determine all of the information that you can about the hardware of your own PC:
    1. CPU manufacturer, type, and clock speed.
    2. Type, amount, and speed of memory.
    3. Size of cache memories.
    4. Type, size, and speed of disk (and its I/O interface).
    5. Can you find out the chip set type?
  3. Determine the exact version of the operating system and compiler you are using.
  4. If you have additional thoughts about the above discussion of programming experience, please email me.
  5. Read the text for next week.

Next Lecture

Next lecture:

第2回 10月7日
Lecture 2, October 7: Fundamentals of Computer Design

以下で、P-Hはコンピュータの構成と設計~ハードウエアとソフトウエアの インタフェース 第3版、 H-Pはコンピュータアーキテクチャ 定量的アプローチ 第4版.

Below, P-H is Computer Organization and Design: The Hardware-Software Interface, and H-P is Computer Architecture: A Quantitative Approach.

Readings for next time: